DVD – Lecture 8: Clock Tree Synthesis

This is Lecture 8 of the Digital VLSI Design course at Bar-Ilan University. In this course, I cover the basics of Chip Implementation, from designing the logic (RTL) to providing a layout ready for fabrication (GDS).

Lecture 8 covers the realization of the clocking network, starting from the basic ideas, through clock trees and alternative approaches, such as clock grids and spines. The lecture also covers clock concurrent optimization (CCOpt) and implementing clock trees in EDA tools.

Lecture slides can be found on the EnICS Labs web site at:
https://enicslabs.com/academic-courses/dvd-english/

All rights reserved:
Prof. Adam Teman
Emerging nanoscaled Integrated Circuits and Systems (EnICS) Labs
Faculty of Engineering, Bar-Ilan University